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Secure System Design and Trustable Computing

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Beschreibung

Produktdetails

Einband

Taschenbuch

Erscheinungsdatum

23.08.2016

Herausgeber

Chip-Hong Chang + weitere

Verlag

Springer

Seitenzahl

537

Maße (L/B/H)

23,5/15,5/3 cm

Gewicht

836 g

Auflage

Softcover reprint of the original 1st ed. 2016

Sprache

Englisch

ISBN

978-3-319-35221-3

Beschreibung

Portrait

Chip-Hong Chang received his Ph.D. degree from Nanyang Technological
University (NTU) of Singapore in 1998. He served as a Technical
Consultant in industry prior to joining the School of Electrical and
Electronic Engineering (EEE) of
NTU in 1999, where he is currently an Associate Professor. He held
joint appointments with the university as Assistant Chair of the School
of EEE from 2008 to 2014, Deputy Director of the Center for High
Performance Embedded Systems from 2000 to 2011, and
Program Director of the Center for Integrated Circuits and Systems from
2003 to 2009. He edited and coedited two books, published eight book
chapters, and more than 200 refereed international journal and
conference papers in hardware-oriented security, low
power arithmetic circuits, residue number systems and digital filter
design. He is a Fellow of IET.

Produktdetails

Einband

Taschenbuch

Erscheinungsdatum

23.08.2016

Herausgeber

Verlag

Springer

Seitenzahl

537

Maße (L/B/H)

23,5/15,5/3 cm

Gewicht

836 g

Auflage

Softcover reprint of the original 1st ed. 2016

Sprache

Englisch

ISBN

978-3-319-35221-3

Herstelleradresse

Springer Nature c/o IBS
Benzstrasse 21
48619 Heek
DE

Email: Tanja.Keller@springer.com

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  • Produktbild: Secure System Design and Trustable Computing
  • Produktbild: Secure System Design and Trustable Computing
  • Part I : Hardware Security Primitives.- Disorder-Based Security Hardware: An Overview.- Design and Implementation of High-Quality Physical Unclonable Functions for Hardware-oriented Cryptography.- Digital Bimodal Functions and Digital Physical Unclonable Functions: Architecture and Applications.- Residue number systems in cryptography: design, challenges, robustness.- Fault Attacks on AES and their Countermeasures.- Hardware Counterfeiting and Integrity Protection.- Circuit Timing Signature (CTS) for Detection of Counterfeit Integrated Circuits .- Hardware Trojan Detection in Analog/RF Integrated CircuitsFPGAs.- Obfuscation-based Secure SoC Design for Protection against Piracy and Trojan Attacks.- Towards Building Trusted Systems: Vulnerabilities, Threats and Mitigation Techniques.- Hardware IP Watermarking and Fingerprinting.- IP Protection of FPGA Cores through a Novel Public/Secret-key Encryption Mechanism.- Secure Licensing of IP Cores on SRAM-based FPGAs.- Part III: Trust in Softwares, Networks and Services.- Heterogeneous Architectures: Malware and Countermeasures.- Trusted, Heterogeneous, and Autonomic Mobile Cloud.- Infiltrating Social Network Accounts: Attacks and Defenses.- An Economical, Deployable and Secure Architecture for the Initial Deployment Stage of Vehicular Ad-Hoc Network.- Deception-based Survivability.