Energy-Aware System Design Algorithms and Architectures

From the reviews:

“In addition to disruptions to global financial systems, the prospect of the world having inadequate energy sources to meet growing demands is becoming more widely appreciated. … this book is timely in offering ‘state-of-the-art ideas for low power design methods from circuit, architecture to software level.’ … the book incorporates three case studies taken from such diverse areas as mobile storage, biomedical electronics and security systems. … this volume will give its readers extremely useful insights into design technologies for avoiding a world energy crisis.” (K. Alan Shore, Optics & Photonics News, December, 2011)

Chong-Min Kyung has joined KAIST in 1983, and currently holds Hynix Chair Professorship at the Department of Electrical Engineering, KAIST. He has published more than 280 international Journal and Conference papers on CAD algorithms, 3-D graphics, System-on-a-Chip design and verification methodology, RISC/CISC microprocessors, VLIW and reconfigurable DSP cores, various video CODEC algorithms, and  energy-aware smart sensor design. His current research includes system-level low-power design, electrical/thermal co-design in 3D IC, architectures of H.264 video CODEC and rate-distortion-power optimization. He is founding Director of the IDEC(Integrated Circuit Design Education Center) supporting over 60 universities in Korea for MPW chip fabrication since 1995. He served as General Chair in the Korean Semiconductor Conference 2002, ISOCC 2004, A-SSCC 2007, and ASP_DAC 2008.He received the Most Excellent Design Award, and Special Feature Award in the University Design Contest in the ASP-DAC 1997 and 1998, respectively. He received the Best Paper Awards in the 36th DAC held in New Orleans, LA in 1999; in the 10th ICSPAT, Orlando, FL in 1999; and in the ICCD Austin, TX in 1999. In 2000, he received National Medal from Korean government for his contribution to research and education in IC design. He is a member of National Academy of Engineering Korea(NAEK), and Korean Academy of Science and Technology(KAST).. He is a Fellow of IEEE. Sungjoo Yoo is currently an assistant professor at Department of EE, POSTECH, Korea. He received Ph.D. from Seoul National Univ. in 2000. He worked as researcher at TIMA laboratory, Grenoble France from 2000 to 2004. He was also with Samsung System LSI from 2004 to 2008, where he led system-on-chip architecture design team and was involved in architecture designs for mobile application processors and solid state disk. His research interests include software, architecture and RTL design for low power SoC, and memory and storage hierarchy from cache, DRAM, phase-change RAM to solid state disk. He received Best Paper Award at International SoC Conference (ISOCC) in 2006 and Best Paper nominations at Design Automation Conference (DAC) in 2011 and Design Automation and Test in Europe (DATE) in 2002 and 2009.