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Band 317

Code Generation for Embedded Processors

Aus der Reihe The Springer International Series in Engineering and Computer Science

198,99 €

inkl. gesetzl. MwSt., Versandkostenfrei

Beschreibung

Produktdetails

Einband

Taschenbuch

Erscheinungsdatum

13.11.2012

Herausgeber

Peter Marwedel + weitere

Verlag

Springer Us

Seitenzahl

298

Maße (L/B/H)

23,5/15,5/1,7 cm

Gewicht

470 g

Auflage

2002

Sprache

Englisch

ISBN

978-1-4613-5983-8

Beschreibung

Portrait

Dr. Peter Marwedel received his PhD in Physics from the University of Kiel in 1974. He is one of the early researchers in high level synthesis, working on the MIMOLA system for a number of years. Dr. Marwedel is a professor at the University of Dortmund since 1989. He has served as the chairman of the computer science department, has played a leading role in establishing the Design, Automation and Test in Europe (DATE) conference and is the chairman of the Informatik Centrum Dortmund (ICD), a technology transfer centre.

Produktdetails

Einband

Taschenbuch

Erscheinungsdatum

13.11.2012

Herausgeber

Verlag

Springer Us

Seitenzahl

298

Maße (L/B/H)

23,5/15,5/1,7 cm

Gewicht

470 g

Auflage

2002

Sprache

Englisch

ISBN

978-1-4613-5983-8

Herstelleradresse

Springer-Verlag KG
Sachsenplatz 4-6
1201 Wien
AT

Email: GPSR Kontakt

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  • Produktbild: Code Generation for Embedded Processors
  • Produktbild: Code Generation for Embedded Processors
  • Contributors. Preface. Part I: Requirements. 1. Code Generation for Embedded Processors: an Introduction; P. Marwedel. 2. Retargetable Code Generation: Key Issues for Successful Introduction; P. Vanoostende, et al. 3. Challenges in Code Generation for Embedded Processors; G. Araujo, et al. Part II: Retargetable Code Generation Systems. 4. FLEXWARE: A Flexible Firmware Development Environment for Embedded Systems; P.G. Paulin, et al. 5. CHESS: Retargetable Code Generation for Embedded DSP Processors; D. Lanneer, et al. 6. An ILP-Based Approach to Code Generation; T. Wilson, et al. 7. Retargetable Code Generation for Parallel, Pipelined Processor Structures; W. Schenk. Part III: Machine Description Models and Formal Methods. 8. Beyond Tool-Specific Machine Descriptions; A. Fauth. 9. On Transforming Code Generation to a Parsing Problem; F. Mavaddat. 10. Local Microcode Generation in System Design; M. Langevin, et al. 11. Code Generation Based on Trellis Diagrams; B. Wess. 12. A Unified Code Generation Approach Using Mutation Scheduling; S. Novack, et al. Part IV: Special Applications and Future Directions. 13. Retargetable Compilation of Self-Test Programs Using Constraint Logic Programming; U. Bieker. 14. Code Generation for Transport Triggered Architectures; H. Corporaal, J. Hoogerbrugge. 15. Software Synthesis for Real-Time Information Processing Systems; M. Cornero, et al. References. Index.